Signal Integrity

Tools

si-expertise

FPGA’S, CPLD’S, ASIC’S, PROCESSORS & MICRO CTRLS
ETHERNET, MMI, SGMII & RGMII
DDR, DDR2, DDR3 & DDR4
FLASH, PROM, SRAM, DPRAM
BACKPLANE
ADC & DAC INTERFACES
XLAUR, RXAUI, XUAI & HYPERLINK INTERFACE
XFI & SFP
USB1, USB2, USB3 & HDMI
PCI1, PCI2, PCI3 & SATA, ROCKET IOS
3D VIA EXTRACTION
MULTI BOARD SIMULATION

1) Stackup Design

  • Providing suggestions to achieve better layer structure by ensuring proper reference thereby minimizing Crosstalk and EMI related issue.
  • Dielectric Material suggestion for High speed designs to minimize Channel Loss.
stackup

2) Pre Layout Signal Integrity Analysis

  • Topology Creation
  • Determination of termination schemes, placement optimization & Trace length optimization.
  • Via designing for High speed serial links.
  • Providing Layout guidelines to Layout engineer.
  • Time Domain Analysis.
  • Transient Analysis - Validating the logic level, Drive strengths, Thresholds, Over/Under shoot, Propagation Delay, Noise margin, Slew Rate, Timing Budget (setup/Hold time).
  • Eye Diagram Analysis - Eye Opening and Jitter Validation.
  • Frequency Domain Analysis - Channel loss (IL & RL) characteristics for SERDES links.
  • NEXT & FEXT validation for SERDES signals.
Pre Layout Signal Integrity Analysis

3) Post Layout Signal Integrity Analysis

  • Layout Review to ensure Best layout practice.
  • Topology extraction with Actual PCB Parasitics.
  • Time Domain Analysis.
  • Transient Analysis - Validating the logic level, Drive strengths, Thresholds, Over/Under shoot, Propagation Delay, Noise margin, Slew Rate, Timing Budget (setup/Hold time).
  • Eye Diagram Analysis - Eye Opening and Jitter Validation.
  • Crosstalk level estimation for Parallel bus interface signals.
  • Frequency Domain Analysis - Channel loss (IL & RL) characteristics for SERDES links.
  • NEXT & FEXT validation for SERDES signals.
Post Layout Signal Integrity Analysis​

Power integrity Analysis

1) DC Drop Analysis

  • Analyzing power distribution networks to validate IR Drop caused due to losses present in conduction materials and layout constraints.
  • Results indicating current density and voltage values at each power pins of circuit devices.
  • 3D plot generation representing voltage and current distribution through the power planes.
DC Drop Analysis​

2) Decoupling Analysis

Decoupling Analysis
  • Analyzing impedance response of power distribution network at multiple board locations across a broad range of frequencies.
  • Optimizing the usage of capacitors based on performance and placement on the board.
  • Stackup suggestions for proper board decoupling.

3) Plane Noise Analysis

Plane Noise Analysis ​
  • Analyzing Simultaneous Switching Noise created in power distribution networks due to high switching frequencies.
  • Ensuring optimum decoupling to reduce noise (power bounce and ground bounce) coupling effects.

EMI Analysis

  • Far field net level radiated emissions spectrum generated considering a single signal at a time helps in identification of the emission level from the trace geometries at required distance from the source and provides provision to compare with emission standards.
EMI Analysis​

Thermal analysis

1) Board level Thermal Analysis

Board level Thermal Analysis
  • Embedding thermal parameters along with surrounding environment and boundary conditions.
  • Simulation performed for all ambient temperature conditions.
  • Results include Component temperature profile, Board temperature profile and Board gradient results to understand the overall thermal behaviour of the board.
  • Modelling heat sinks and thermal plates to ensure proper heat dissipation.

2) System Level Thermal Analysis

System Level Thermal Analysis
  • Environmental Conditions.
  • Pre-Simulation Analysis and the benefits of the first law of thermodynamics.
  • Modes of Heat transfer and the effect on System Level.

RELIABILITY ANALYSIS

PTC Windchill quality solutions

1) MTBF Reliability Analysis

MTBF Reliability Analysis
  • Embedding component parameters like temperature and current rating.
  • Simulation performed for all environment conditions.
  • Mean Time Between Failure (MTBF) study.
  • Simulation is performed to calculate the Failure rate of the system .

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